I took these gigabyte figures for NAND and DRAM and turned those into transistors shipped, then doubled the result using that assumption that half of all transistors are memory.

An industry-wide transition for the nonvolatile NAND flash memory technology from memory cells in a 2-D array to strings of NAND transistors integrated monolithically in the vertical direction is now ...

Gigabyte figures for NAND and DRAM could be turned into transistors shipped, then doubled the result using that assumption that half of all transistors are memory.

Toshiba announced a flash memory chip that stacks 48 transistors vertically, improving density over previous industry leaders such as Samsung.

Using just four vertically stacked transistors, they implemented the functionality of a six-transistor 2D NAND with a footprint six times smaller. Arrays of these 3D NAND gates showed outstanding ...

Samsung has just announced production of 490 and 980 GB solid state drives based on its new 3D V-NAND flash memory. The new architecture functions faster while using less power than conventional ...

Accordingly, Intel wants to describe processes in terms of millions of logic transistors per square millimeter, calculated using a 3:2 mix of NAND cells and scan flip flop cells.

The NAND flash technology that Toshiba introduced in 1989, making thumb drives, SSDs and your smartphone’s memory possible, has finally reached a development dead end.

Porod and his colleagues equipped their new chip with a universal logic gate -- a combination of the NAND and NOR gates. Together, these two logic gates can perform any of the basic arithmetic ...